Sr. Manager, Foundation IP (Standard Cells & Memories),, Annapurna Labs

Sr. Manager, Foundation IP

Annapurna Labs, our silicon organization within AWS Utility Computing, builds the custom chips behind AWS Graviton, Nitro, Inferentia and Trainium. Our Machine Learning Acceleration (MLA) team develops the Trainium and Inferentia SoCs that train and serve frontier AI models at datacenter scale. On AI silicon, foundation IP is not a commodity. SRAM and register files dominate die area and power, and every picosecond and square micron in a standard cell library compounds across billions of instances. We are looking for a Sr. Manager, Foundation IP to own that layer end to end from foundry DTCO and vendor roadmaps, through custom cell and memory definition, to characterization and silicon correlation on leading-edge GAA nodes (N3, N2 and below).

You will be the single technical point of contact for our foundation IP vendors and memory providers, lead a hands-on team of 36 engineers, and partner with Architecture, Physical Design, CAD, DFT and Product Engineering to turn IP decisions into measurable PPA wins on every Trainium and Inferentia generation. This is a player-coach role: you will set strategy and hold vendors to Amazon's bar and you will also review schematics, layouts and Liberty data yourself.

Key job responsibilities:

• Foundation IP strategy & vendor ownership
• PPA evaluation & library selection
• Memory specification & vendor interface
• Latch arrays & custom memory macros
• Custom & combo standard cells
• Characterization & signoff views
• Foundry DTCO & node enablement
• Team leadership

Basic Qualifications:

• 3+ years of people management, managing engineers experience
• BS in Electrical or Computer Engineering with 12+ years, MS with 10+ years, or PhD with 7+ years of experience in standard cell, memory or custom digital circuit design
• Hands-on transistor-level design experience across standard cells, sequentials/latches, and SRAM or register files in FinFET or GAA technologies at 5nm or below
• Experience as the technical interface to foundation IP vendors or foundries specifying deliverables and driving SOWs, schedules, ECOs and IP quality
• Experience evaluating standard cell library and memory PPA using block-level synthesis and place-and-route
• Experience with standard cell and memory characterization and EDA views (Liberty/LVF, LEF, Verilog) using Synopsys PrimeLib/SiliconSmart or Cadence Liberate
• Proficiency with custom design and verification tools: Cadence Virtuoso or Synopsys Custom Compiler; Spectre or HSPICE/PrimeSim; Siemens Calibre or Synopsys ICV
• Scripting experience in Python, Tcl, Perl or SKILL

Preferred Qualifications:

• Master's degree or Ph.D. degree in Electrical Engineering or related field
• Experience on N3, N2 or below technologies, including backside power delivery and mixed-height standard cell libraries
• Design or integration of latch-based arrays, custom multi-port register files, or TCAM/CAM for high-performance processors or ML accelerators
• Track record defining custom and combo cells (multi-bit flops, complex/fused cells, datapath compressors) from netlist analytics, with measured block-level PPA gains
• Memory design depth: bitcell options, read/write assist, Vmin, redundancy/repair, MBIST/BISR, low-power modes, and memory EM/IR analysis (Ansys Totem, Cadence Voltus-XFi)
• Test chip definition, silicon characterization and model-to-silicon correlation, including aging, self-heating and EM reliability
• GPIO, ESD, eFuse/OTP and on-die PVT sensor IP selection and integration
• Working knowledge of physical design and signoff flows: Fusion Compiler, Innovus, PrimeTime, Tempus, StarRC, Quantus, RedHawk-SC
• Experience on AI/ML accelerator or high-performance SoC programs taken to high-volume production
• Demonstrated ability to influence external partners and make high-judgment tradeoffs under ambiguity
• Demonstrated alignment with Amazon's Leadership Principles at the Sr. Manager bar

Amazon is an equal opportunity employer and does not discriminate on the basis of protected veteran status, disability, or other legally protected status.

Los Angeles County applicants: Job duties for this position include: work safely and cooperatively with other employees, supervisors, and staff; adhere to standards of excellence despite stressful conditions; communicate effectively and respectfully with employees, supervisors, and staff to ensure exceptional customer service; and follow all federal, state, and local laws and Company policies. Criminal history may have a direct, adverse, and negative relationship with some of the material job duties of this position. These include the duties and responsibilities listed above, as well as the abilities to adhere to company policies, exercise sound judgment, effectively manage stress and work safely and respectfully with others, exhibit trustworthiness and professionalism, and safeguard business operations and the Company's reputation. Pursuant to the Los Angeles County Fair Chance Ordinance, we will consider for employment qualified applicants with arrest and conviction records.

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The base salary range for this position is listed below. Your Amazon package will include sign-on payments and restricted stock units (RSUs). Final compensation will be determined based on factors including experience, qualifications, and location. Amazon also offers comprehensive benefits including health insurance (medical, dental, vision, prescription, Basic Life & AD&D insurance and option for Supplemental life plans, EAP, Mental Health Support, Medical Advice Line, Flexible Spending Accounts, Adoption and Surrogacy Reimbursement coverage), 401(k) matching, paid time off, and parental leave. Learn more about our benefits at https://amazon.jobs/en/benefits.

USA, CA, Cupertino - 277,400.00 - 350,000.00 USD annually

USA, TX, Austin - 241,200.00 - 325,600.00 USD annually